Index: /branches/rel_apv_10_7/usr/click/bin/check_mainboard/check_mainboard.c
===================================================================
--- /branches/rel_apv_10_7/usr/click/bin/check_mainboard/check_mainboard.c	(revision 38113)
+++ /branches/rel_apv_10_7/usr/click/bin/check_mainboard/check_mainboard.c	(working copy)
@@ -94,6 +94,7 @@
 #define CHIPSET_ID_CAR3080		0x00003080 /*CASELL CAR-3080 MB for APV1900/2900*/
 #define CHIPSET_ID_CB1924		0x00001924 /*Aewin CB-1924 MB for APV5900*/
 #define CHIPSET_ID_CB1920		0x00001920 /*Aewin CB-1920 MB for APV7900/9900*/
+#define CHIPSET_ID_CAR5060		0x00005060 /*CASELL CAR-5060 MB for APV8900*/
 
 
 static int
@@ -1498,6 +1499,14 @@
  * PSU 2 Status     | 29h | ok  |  0.0 | Presence detected
  * PSU 2 Pin        | 2Fh | ok  |  3.0 | 88 Watts
  * PSU 2 Pout       | 2Eh | ok  |  3.0 | 72 Watts
+ * 
+ * CAR-5060 motherboard:
+ * PSU1 Status      | D8h | ok  | 10.96 | Presence detected, Power Supply AC lost
+ * PSU1 POut        | DDh | lnr | 10.101 | 0 Watts
+ * PSU1 PIn         | DEh | lnr | 10.102 | 0 Watts
+ * PSU2 Status      | E8h | ok  | 10.107 | Presence detected
+ * PSU2 POut        | EDh | ok  | 10.112 | 245 Watts
+ * PSU2 PIn         | EEh | ok  | 10.114 | 280 Watts
  */
 static void
 u_check_power_state_by_ipmi(void)
@@ -1790,6 +1799,28 @@
 			u_sysctlbyname("net.inet.clicktcp.u_sys_temp", NULL, 0, (void *)&sys_temp, len);
 		}
 		break;
+	case CHIPSET_ID_CAR5060:
+		cpu1_temp = u_read_ipmi_sensor("CPU0 Temp");
+		if (last_cpu1_temp != cpu1_temp) {
+			last_cpu1_temp = cpu1_temp;
+			len = sizeof(cpu1_temp);
+			u_sysctlbyname("net.inet.clicktcp.u_cpu1_temp", NULL, 0, (void *)&cpu1_temp, len);
+		}
+
+		cpu2_temp = u_read_ipmi_sensor("CPU1 Temp");
+		if (last_cpu1_temp != cpu2_temp) {
+			last_cpu1_temp = cpu2_temp;
+			len = sizeof(cpu2_temp);
+			u_sysctlbyname("net.inet.clicktcp.u_cpu1_temp", NULL, 0, (void *)&cpu2_temp, len);
+		}
+			
+		sys_temp = u_read_ipmi_sensor("System Temp0");
+		if (last_sys_temp != sys_temp) {
+			last_sys_temp = sys_temp;
+			len = sizeof(sys_temp);
+			u_sysctlbyname("net.inet.clicktcp.u_sys_temp", NULL, 0, (void *)&sys_temp, len);
+		}	
+		break;
 	default:
 		break;
 	}	
@@ -2234,6 +2265,36 @@
 		if (last_fan4_speed != fan4_speed) {
 			last_fan4_speed = fan4_speed;
 			len = sizeof(fan4_speed);
+			u_sysctlbyname("net.inet.clicktcp.u_fan4_speed", NULL, 0, (void *)&fan4_speed, len);
+		}
+		break;
+
+	case CHIPSET_ID_CAR5060:
+		fan1_speed = u_read_ipmi_sensor("SystemFan1 speed");
+		if (last_fan1_speed != fan1_speed) {
+			last_fan1_speed = fan1_speed;
+			len = sizeof(fan1_speed);
+			u_sysctlbyname("net.inet.clicktcp.u_fan1_speed", NULL, 0, (void *)&fan1_speed, len);
+		}
+
+		fan2_speed = u_read_ipmi_sensor("SystemFan2 speed");
+		if (last_fan2_speed != fan2_speed) {
+			last_fan2_speed = fan2_speed;
+			len = sizeof(fan2_speed);
+			u_sysctlbyname("net.inet.clicktcp.u_fan2_speed", NULL, 0, (void *)&fan2_speed, len);
+		}
+
+		fan3_speed = u_read_ipmi_sensor("SystemFan3 speed");
+		if (last_fan3_speed != fan3_speed) {
+			last_fan3_speed = fan3_speed;
+			len = sizeof(fan3_speed);
+			u_sysctlbyname("net.inet.clicktcp.u_fan3_speed", NULL, 0, (void *)&fan3_speed, len);
+		}
+
+		fan4_speed = u_read_ipmi_sensor("SystemFan4 speed");
+		if (last_fan4_speed != fan4_speed) {
+			last_fan4_speed = fan4_speed;
+			len = sizeof(fan4_speed);
 			u_sysctlbyname("net.inet.clicktcp.u_fan4_speed", NULL, 0, (void *)&fan4_speed, len);
 		}
 		break;
Index: /branches/rel_apv_10_7/usr/click/bin/encode_lickey/enckey.html
===================================================================
--- /branches/rel_apv_10_7/usr/click/bin/encode_lickey/enckey.html	(revision 38113)
+++ /branches/rel_apv_10_7/usr/click/bin/encode_lickey/enckey.html	(working copy)
@@ -898,6 +898,8 @@
 				<OPTION>
 				Array APV 7900
 				<OPTION>
+				Array APV 8900
+				<OPTION>
 				Array APV 9900
 			</SELECT>
 			<BR>
Index: /branches/rel_apv_10_7/usr/click/lib/libca_snmp_mib/monitor.c
===================================================================
--- /branches/rel_apv_10_7/usr/click/lib/libca_snmp_mib/monitor.c	(revision 38113)
+++ /branches/rel_apv_10_7/usr/click/lib/libca_snmp_mib/monitor.c	(working copy)
@@ -42,6 +42,7 @@
 #define CHIPSET_ID_CAR3080		0x00003080 /*CASELL CAR-3080 MB for APV1900/2900*/
 #define CHIPSET_ID_CB1924		0x00001924 /*Aewin CB-1924 MB for APV5900*/
 #define CHIPSET_ID_CB1920		0x00001920 /*Aewin CB-1920 MB for APV7900/9900*/
+#define CHIPSET_ID_CAR5060		0x00005060 /*CASELL CAR-5060 MB for APV8900*/
 
 oid monitor_variables_oid[] = { 1,3,6,1,4,1,ARRAY_COMPINFO_MIBOID,32 };
 
Index: /branches/rel_apv_10_7/usr/click/lib/libfeactl/feactl.c
===================================================================
--- /branches/rel_apv_10_7/usr/click/lib/libfeactl/feactl.c	(revision 38113)
+++ /branches/rel_apv_10_7/usr/click/lib/libfeactl/feactl.c	(working copy)
@@ -315,6 +315,8 @@
      2000, NULL},
   { ARRAY_PRODINFO_APV7900, AFM_MODEL_7900_APV, 0x00004002, 0x00000007, 1024*128,
      2000, NULL},
+  { ARRAY_PRODINFO_APV8900, AFM_MODEL_8900_APV, 0x00004002, 0x00000007, 1024*128,
+     2000, NULL},
   { ARRAY_PRODINFO_APV9900, AFM_MODEL_9900_APV, 0x00004002, 0x00000007, 1024*256,
      2000, NULL},
   { ARRAY_PRODINFO_AVX5900, AFM_MODEL_5900_AVX, 0x00004002, 0x00000007, 1024*64,
Index: /branches/rel_apv_10_7/usr/click/lib/libfeactl/feactl_handlers.c
===================================================================
--- /branches/rel_apv_10_7/usr/click/lib/libfeactl/feactl_handlers.c	(revision 38113)
+++ /branches/rel_apv_10_7/usr/click/lib/libfeactl/feactl_handlers.c	(working copy)
@@ -115,6 +115,7 @@
 			case AFM_MODEL_2900_APV:
 			case AFM_MODEL_5900_APV:
 			case AFM_MODEL_7900_APV:
+			case AFM_MODEL_8900_APV:
 			case AFM_MODEL_9900_APV:
 				return (0);
 		    default:
Index: /branches/rel_apv_10_7/usr/click/lib/libip/ipvers.c
===================================================================
--- /branches/rel_apv_10_7/usr/click/lib/libip/ipvers.c	(revision 38113)
+++ /branches/rel_apv_10_7/usr/click/lib/libip/ipvers.c	(working copy)
@@ -187,6 +187,7 @@
 #define CHIPSET_ID_CAR3080		0x00003080 /*CASELL CAR-3080 MB for APV1900/2900*/
 #define CHIPSET_ID_CB1924		0x00001924 /*Aewin CB-1924 MB for APV5900*/
 #define CHIPSET_ID_CB1920		0x00001920 /*Aewin CB-1920 MB for APV7900/9900*/
+#define CHIPSET_ID_CAR5060		0x00005060 /*CASELL CAR-5060 MB for APV8900*/
 #define BUFFER_SIZE             1024
 #define QAT_8960_SUBID          "0001"
 #define QAT_8970_SUBID          "0002"
@@ -399,7 +400,8 @@
 					chipset_id == CHIPSET_ID_X11DPi_N ||
 					chipset_id == CHIPSET_ID_SCB1816 ||
 					chipset_id == CHIPSET_ID_CB1924 ||
-					chipset_id == CHIPSET_ID_CB1920) {
+					chipset_id == CHIPSET_ID_CB1920 ||
+					chipset_id == CHIPSET_ID_CAR5060) {
 
 				hw_diag_sprintf_s("%-22s: %d\n", "FAN4 Speed", km_p->fan4_speedr);
 			}
@@ -414,7 +416,8 @@
 			if (chipset_id != CHIPSET_ID_SCB1816 && 
 				chipset_id != CHIPSET_ID_CAR3080 && 
 				chipset_id != CHIPSET_ID_CB1924 &&
-				chipset_id != CHIPSET_ID_CB1920) {
+				chipset_id != CHIPSET_ID_CB1920 &&
+				chipset_id != CHIPSET_ID_CAR5060) {
 				hw_diag_sprintf_s("%-22s: %d\n", "CPU1 FAN Speed", km_p->cpu1fan_speedr);
 			}
 
@@ -2991,7 +2994,8 @@
 					chipset_id == CHIPSET_ID_X11DPi_N ||
 					chipset_id == CHIPSET_ID_MARBLE || 
 					chipset_id == CHIPSET_ID_T1SMFT_E4 ||
-					chipset_id == CHIPSET_ID_CB1924) {
+					chipset_id == CHIPSET_ID_CB1924 ||
+					chipset_id == CHIPSET_ID_CAR5060) {
 				printf("%-22s%-23d%-s\n", "FAN4", km_p->fan4_speedr, km_p->fan4_speedr>=FAN_SPEED_OK?"Normal":"Abnormal");
 			}
 
@@ -3004,7 +3008,8 @@
 					chipset_id == CHIPSET_ID_FT2004 || 
 					chipset_id == CHIPSET_ID_HW_FT2004) {
 				printf("%-22s%-23d%-s\n", "CPU1_FAN", km_p->cpu1fan_speedr, km_p->cpu1fan_speedr>=FAN_OK_SPEED_LOW?"Normal":"Abnormal");
-			} else if (chipset_id != CHIPSET_ID_SCB1816 && chipset_id != CHIPSET_ID_CAR3080 && chipset_id != CHIPSET_ID_CB1924) {
+			} else if (chipset_id != CHIPSET_ID_SCB1816 && chipset_id != CHIPSET_ID_CAR3080 && 
+						chipset_id != CHIPSET_ID_CB1924 && chipset_id != CHIPSET_ID_CAR5060) {
 				printf("%-22s%-23d%-s\n", "CPU1_FAN", km_p->cpu1fan_speedr, km_p->cpu1fan_speedr>=FAN_SPEED_OK?"Normal":"Abnormal");
 			}
 
Index: /branches/rel_apv_10_7/usr/click/lib/libuinet-atcp/lib/libuinet/uinet_host_interface.c
===================================================================
--- /branches/rel_apv_10_7/usr/click/lib/libuinet-atcp/lib/libuinet/uinet_host_interface.c	(revision 38113)
+++ /branches/rel_apv_10_7/usr/click/lib/libuinet-atcp/lib/libuinet/uinet_host_interface.c	(working copy)
@@ -241,6 +241,7 @@
 #define TM_NCE_MB_CAR3080		"CAR-3080"
 #define TM_NCE_MB_CB1924		"CB-1924"
 #define TM_NCE_MB_CB1920		"CB-1920"
+#define TM_NCE_MB_CAR5060		"CAR-5060"
 #define CHIPSET_ID_X9SRW_F		0x1d108086
 #define CHIPSET_ID_X9DRi_F		0x3c008086
 #define CHIPSET_ID_X10DRi		0x2f008086
@@ -262,6 +263,7 @@
 #define CHIPSET_ID_CAR3080		0x00003080 /*CASELL CAR-3080 MB for APV1900/2900*/
 #define CHIPSET_ID_CB1924		0x00001924 /*Aewin CB-1924 MB for APV5900*/
 #define CHIPSET_ID_CB1920		0x00001920 /*Aewin CB-1920 MB for APV7900/9900*/
+#define CHIPSET_ID_CAR5060		0x00005060 /*CASELL CAR-5060 MB for APV8900*/
 
 struct uhi_rte_eal_args atcp_args[] = {
 	{"rte_mem_size", "-m %s", NULL, 0, 1, NULL},
@@ -2647,6 +2649,10 @@
 			id = CHIPSET_ID_CB1920;
 			goto finished;
 		}
+		if (strncmp(chipset, TM_NCE_MB_CAR5060, strlen(TM_NCE_MB_CAR5060)) == 0) {
+			id = CHIPSET_ID_CAR5060;
+			goto finished;
+		}
 	}
 
 	if ( id == 0 ) {
Index: /branches/rel_apv_10_7/usr/click/lib/libuinet-atcp/lib/libuinet/uinet_host_pci.c
===================================================================
--- /branches/rel_apv_10_7/usr/click/lib/libuinet-atcp/lib/libuinet/uinet_host_pci.c	(revision 38113)
+++ /branches/rel_apv_10_7/usr/click/lib/libuinet-atcp/lib/libuinet/uinet_host_pci.c	(working copy)
@@ -12,6 +12,7 @@
 #define CHIPSET_ID_CAR3080		0x00003080 /*CASELL CAR-3080 MB for APV1900/2900*/
 #define CHIPSET_ID_CB1924		0x00001924 /*Aewin CB-1924 MB for APV5900*/
 #define CHIPSET_ID_CB1920		0x00001920 /*Aewin CB-1920 MB for APV7900/9900*/
+#define CHIPSET_ID_CAR5060		0x00005060 /*CASELL CAR-5060 MB for APV8900*/
 
 /* pci bridge that present slots */
 #define MAX_DEV_PER_CARD 16
@@ -452,6 +453,10 @@
 	} else if (chipset_id == CHIPSET_ID_CB1920) {
 		total_pcib = find_pcib(93, NULL, 0);
 		total_pcib += find_pcib(23, NULL, 0);
+	} else if (chipset_id == CHIPSET_ID_CAR5060) {
+		//Only added onboard(0) and slot1(22) for now. Need add more later.
+		total_pcib = find_pcib(0, NULL, 0);
+		total_pcib += find_pcib(22, NULL, 0);
 	} else {
 
 	/* if there are 2 north bridge,
@@ -513,6 +518,9 @@
 	} else if (chipset_id == CHIPSET_ID_CB1920) {
 		total_pcib = find_pcib(93, pcib_nicdevs, 0);
 		total_pcib += find_pcib(23, &pcib_nicdevs[total_pcib], 0);
+	} else if (chipset_id == CHIPSET_ID_CAR5060) {
+		total_pcib = find_pcib(0, pcib_nicdevs, 0);
+		total_pcib += find_pcib(22, &pcib_nicdevs[total_pcib], 0);
 	} else {
 		total_pcib = find_pcib(0, pcib_nicdevs, 0);
 		total_pcib += find_pcib(128, &pcib_nicdevs[total_pcib], 1);
Index: /branches/rel_apv_10_7/usr/click/lib/libuinet-atcp/lib/libuinet/uinet_machdep.c
===================================================================
--- /branches/rel_apv_10_7/usr/click/lib/libuinet-atcp/lib/libuinet/uinet_machdep.c	(revision 38113)
+++ /branches/rel_apv_10_7/usr/click/lib/libuinet-atcp/lib/libuinet/uinet_machdep.c	(working copy)
@@ -989,6 +989,11 @@
 			dual_power_mode = 1;
 			powersupply_id = 210112;
 			break;
+		case 908900:
+			model_id = AFM_MODEL_8900_APV;
+			dual_power_mode = 1;
+			powersupply_id = 210112;
+			break;
 		case 909900:
 			model_id = AFM_MODEL_9900_APV;
 			dual_power_mode = 1;
@@ -1086,6 +1091,9 @@
 		case AFM_MODEL_5900_APV:
 			ledctl_mode = LEDCTL_NONE;
 			break;
+		case AFM_MODEL_8900_APV:
+			ledctl_mode = LEDCTL_CASWELL_CAR5060;
+			break;
 		case AFM_MODEL_7900_APV:
 		case AFM_MODEL_9900_APV:
 			ledctl_mode = LEDCTL_AEWIN_CB1920;
Index: /branches/rel_apv_10_7/usr/src/sys/click/app/snmp/snmp_trap.c
===================================================================
--- /branches/rel_apv_10_7/usr/src/sys/click/app/snmp/snmp_trap.c	(revision 38113)
+++ /branches/rel_apv_10_7/usr/src/sys/click/app/snmp/snmp_trap.c	(working copy)
@@ -1633,7 +1633,7 @@
 		chipset_id == CHIPSET_ID_MARBLE || chipset_id == CHIPSET_ID_T1SMFT_E4 || chipset_id == CHIPSET_ID_X11SPL_F || 
 		chipset_id == CHIPSET_ID_FT2000_4 || chipset_id == CHIPSET_ID_FT2004 || 
 		chipset_id == CHIPSET_ID_HW_FT2004 || chipset_id == CHIPSET_ID_CAR3080 || chipset_id == CHIPSET_ID_CB1924 ||
-		chipset_id == CHIPSET_ID_CB1920) {
+		chipset_id == CHIPSET_ID_CB1920 || chipset_id == CHIPSET_ID_CAR5060) {
 		n = u_power_state;
 	} else {
 		n = inb(PW_STATUS) & IPMI_DUALPS_OUT; /*read state of powers from port PW_STATUS*/
Index: /branches/rel_apv_10_7/usr/src/sys/click/app/util/feactl_kern.h
===================================================================
--- /branches/rel_apv_10_7/usr/src/sys/click/app/util/feactl_kern.h	(revision 38113)
+++ /branches/rel_apv_10_7/usr/src/sys/click/app/util/feactl_kern.h	(working copy)
@@ -77,7 +77,8 @@
 #define AFM_MODEL_9900_AVX 68
 #define AFM_MODEL_7901_AVX 69
 #define AFM_MODEL_9901_AVX 70
-#define MAX_MODEL               71
+#define AFM_MODEL_8900_APV 71
+#define MAX_MODEL               72
 
 #define AFM_WR_INVALID_MODEL       -1
 #define	AFM_WR_MODEL_vAPV		0
Index: /branches/rel_apv_10_7/usr/src/sys/click/net/if_cafw.c
===================================================================
--- /branches/rel_apv_10_7/usr/src/sys/click/net/if_cafw.c	(revision 38113)
+++ /branches/rel_apv_10_7/usr/src/sys/click/net/if_cafw.c	(working copy)
@@ -455,6 +455,23 @@
 	},
 };
 
+// Caswell CAR-5060
+// [root@localhost ~]# lspci -vt
+//  +-[0000:16]-+-02.0-[17]--+-00.0  Intel Corporation Ethernet Controller X710 for 10GbE SFP+
+//  |           |            +-00.1  Intel Corporation Ethernet Controller X710 for 10GbE SFP+
+//  |           |            +-00.2  Intel Corporation Ethernet Controller X710 for 10GbE SFP+
+//  |           |            \-00.3  Intel Corporation Ethernet Controller X710 for 10GbE SFP+
+//  +-[0000:00]-+-1c.4-[04]----00.0  Intel Corporation I210 Gigabit Network Connection
+//              +-1c.5-[05]----00.0  Intel Corporation I210 Gigabit Network Connection
+static struct pcib_slot_map nic_slot_map_pcib_CAR5060[MAX_SUBMAP][MAX_SLOTS] = {
+	{
+		{0, 0}, {-1, -1},
+	},
+	{
+		{1, 0}, {-1, -1},
+	},
+};
+
 /* The PCI address for MARBLE onboard NIC is 06:00.0, 06:00.1, 06:00.2, 06:00.3*/
 #define MARBLE_ONBOARD_NIC_BUS 6
 #define MARBLE_ONBOARD_NIC_DEV 0
@@ -1383,6 +1400,9 @@
 		map = &nic_slot_map_pcib_CB1920[submap][0];
 		is_aewin = 1;
 		break;
+	case CHIPSET_ID_CAR5060:
+		map = &nic_slot_map_pcib_CAR5060[submap][0];
+		break;
 	default:
 		return;
 	}
@@ -1623,6 +1643,9 @@
 	} else if (chipset_id == CHIPSET_ID_CB1920) {
 		add_nics(NICS_ON_BOARD, NIC_ANY_TYPE);
 		add_nics(NICS_ON_SLOTS, NIC_ANY_TYPE);
+	} else if (chipset_id == CHIPSET_ID_CAR5060) {
+		add_nics(NICS_ON_BOARD, NIC_ANY_TYPE);
+		add_nics(NICS_ON_SLOTS, NIC_ANY_TYPE);
 	}
 	
 
@@ -1793,7 +1816,8 @@
 	    chipset_id == CHIPSET_ID_HW_FT2004 ||
 		chipset_id == CHIPSET_ID_CAR3080 ||
 		chipset_id == CHIPSET_ID_CB1924 ||
-		chipset_id == CHIPSET_ID_CB1920) { /* physical appliances */
+		chipset_id == CHIPSET_ID_CB1920 ||
+		chipset_id == CHIPSET_ID_CAR5060) { /* physical appliances */
 		kern_nic_init_by_pcib();
 	} else if (chipset_id == CHIPSET_ID_CB2622 && (afpacket_interface_count == 1)) {
 		kern_nic_init_by_uinet_for_cb2622();
Index: /branches/rel_apv_10_7/usr/src/sys/click/netinet/click_utils.c
===================================================================
--- /branches/rel_apv_10_7/usr/src/sys/click/netinet/click_utils.c	(revision 38113)
+++ /branches/rel_apv_10_7/usr/src/sys/click/netinet/click_utils.c	(working copy)
@@ -2276,11 +2276,11 @@
 	if (chipset_id == CHIPSET_ID_SCB1816 || chipset_id == CHIPSET_ID_SCB1819 || 
 		chipset_id == CHIPSET_ID_CB2612B || chipset_id == CHIPSET_ID_CB2622 ||
 		chipset_id == CHIPSET_ID_CB1727 || chipset_id == CHIPSET_ID_SCB1939 ||
-		chipset_id == CHIPSET_ID_CAR3080 || chipset_id == CHIPSET_ID_CB1924 ||
-		chipset_id == CHIPSET_ID_CB1920) {
+		chipset_id == CHIPSET_ID_CAR3080 || chipset_id == CHIPSET_ID_CB1924) {
 		return check_cpuoverheat_aewin();
 	}
-	if (chipset_id == CHIPSET_ID_MARBLE) {
+	if (chipset_id == CHIPSET_ID_MARBLE || chipset_id == CHIPSET_ID_CAR5060 ||
+		chipset_id == CHIPSET_ID_CB1920) {
 		return check_cpuoverheat_marble();
 	}
 	if (chipset_id == CHIPSET_ID_T1SMFT_E4) {
@@ -4106,6 +4106,45 @@
 		fan3_state != FAN_FAIL && fan4_state != FAN_FAIL);
 }
 
+static int
+check_fanstop_car5060(void)
+{
+	fan1_speed = u_fan1_speed;
+	clickosmonitor->fan1_speedr = fan1_speed;
+	if (fan1_speed >= FAN_OK_SPEED) {
+		fan1_state = FAN_OK;
+	} else {
+		fan1_state = FAN_FAIL;
+	}
+
+	fan2_speed = u_fan2_speed;
+	clickosmonitor->fan2_speedr = fan2_speed;
+	if (fan2_speed >= FAN_OK_SPEED) {
+		fan2_state = FAN_OK;
+	} else {
+		fan2_state = FAN_FAIL;
+	}
+
+	fan3_speed = u_fan3_speed;
+	clickosmonitor->fan3_speedr = fan3_speed;
+	if (fan3_speed >= FAN_OK_SPEED) {
+		fan3_state = FAN_OK;
+	} else {
+		fan3_state = FAN_FAIL;
+	}
+
+	fan4_speed = u_fan4_speed;
+	clickosmonitor->fan4_speedr = fan4_speed;
+	if (fan4_speed >= FAN_OK_SPEED) {
+	        fan4_state = FAN_OK;
+	} else {
+	        fan4_state = FAN_FAIL;
+	}
+
+	clickosmonitor->chipset_id = CHIPSET_ID_CAR5060;
+	return (fan1_state != FAN_FAIL && fan2_state != FAN_FAIL &&
+		fan3_state != FAN_FAIL && fan4_state != FAN_FAIL);
+}
 
 static void
 get_temp_X8DTH(uint8_t *cpu1_temp, uint8_t *cpu2_temp, uint8_t *sys_temp)
@@ -4746,6 +4785,10 @@
 		return check_fanstop_cb1920();
 	}
 
+	if (chipset_id == CHIPSET_ID_CAR5060) {
+		return check_fanstop_car5060();
+	}
+
     outb(WBIO1, 0x47);
     n = inb(WBIO2);
     div1 = 1 << ((n & 0x30) >> 4);
@@ -4938,6 +4981,14 @@
 		clickosmonitor->flagr |= MONITOR_FAN2_SPEED;
 		clickosmonitor->flagr |= MONITOR_FAN3_SPEED;
 		clickosmonitor->flagr |= MONITOR_FAN4_SPEED;
+	}else if (chipset_id == CHIPSET_ID_CAR5060) {
+		clickosmonitor->flagr |= MONITOR_SYS_TEMP;
+		clickosmonitor->flagr |= MONITOR_CPU1_TEMP;
+		clickosmonitor->flagr |= MONITOR_CPU2_TEMP;
+		clickosmonitor->flagr |= MONITOR_FAN1_SPEED;
+		clickosmonitor->flagr |= MONITOR_FAN2_SPEED;
+		clickosmonitor->flagr |= MONITOR_FAN3_SPEED;
+		clickosmonitor->flagr |= MONITOR_FAN4_SPEED;
 	}
 }
 int led_warn_update(void);
@@ -5820,7 +5871,8 @@
 	    chipset_id == CHIPSET_ID_MARBLE  ||
 		chipset_id == CHIPSET_ID_CAR3080  ||
 		chipset_id == CHIPSET_ID_CB1924  ||
-		chipset_id == CHIPSET_ID_CB1920  ||!hardware_control) &&
+		chipset_id == CHIPSET_ID_CB1920  ||
+		chipset_id == CHIPSET_ID_CAR5060  ||!hardware_control) &&
             ca_box_no[10] == '0' && ca_box_no[11] == '0' && ca_box_no[12] == '0') {
                 p32 = (unsigned *) &(addr[0]);
                 machigh = ntohs(*p32);
Index: /branches/rel_apv_10_7/usr/src/sys/click/sys/clickarray.h
===================================================================
--- /branches/rel_apv_10_7/usr/src/sys/click/sys/clickarray.h	(revision 38113)
+++ /branches/rel_apv_10_7/usr/src/sys/click/sys/clickarray.h	(working copy)
@@ -2,7 +2,7 @@
 #define _SYS_CLICKARRAY_H_
 
 /*domestic equipment*/
-#define ARRAY_CN_COMPINFO_COPYRIGHT "Copyright (c) 2023 Beijing Array Networks Co., Ltd. All rights reserved."
+#define ARRAY_CN_COMPINFO_COPYRIGHT "Copyright (c) 2024 Beijing Array Networks Co., Ltd. All rights reserved."
 #define ARRAY_CN_PHONE "400-600-7878"
 #define ARRAY_CN_COMPINFO_EMAIL "support@arraynetworks.com.cn"
 #define ARRAY_CN_COMPINFO_WEBSITE "www.arraynetworks.com.cn"
@@ -16,7 +16,7 @@
 #define ARRAY_COMPINFO_OS "ArrayOS"
 #define ARRAY_COMPINFO_KEYWORD "array"
 #define ARRAY_COMPINFO_OEM_FLAG
-#define ARRAY_COMPINFO_COPYRIGHT "Copyright (c) 2000-2023 Array Networks Inc. All rights reserved."
+#define ARRAY_COMPINFO_COPYRIGHT "Copyright (c) 2000-2024 Array Networks Inc. All rights reserved."
 #define ARRAY_COMPINFO_EMAIL "support@arraynetworks.com"
 #define ARRAY_COMPINFO_WEBSITE "www.arraynetworks.com"
 #define ARRAY_PRODINFO_vAPV "Array vAPV"
@@ -91,6 +91,7 @@
 #define ARRAY_PRODINFO_APV2900 "Array APV 2900"
 #define ARRAY_PRODINFO_APV5900 "Array APV 5900"
 #define ARRAY_PRODINFO_APV7900 "Array APV 7900"
+#define ARRAY_PRODINFO_APV8900 "Array APV 8900"
 #define ARRAY_PRODINFO_APV9900 "Array APV 9900"
 #define ARRAY_PRODINFO_AVX5900 "Array AVX 5900"
 #define ARRAY_PRODINFO_AVX7900 "Array AVX 7900"
Index: /branches/rel_apv_10_7/usr/src/sys/pci/wdt.h
===================================================================
--- /branches/rel_apv_10_7/usr/src/sys/pci/wdt.h	(revision 38113)
+++ /branches/rel_apv_10_7/usr/src/sys/pci/wdt.h	(working copy)
@@ -205,6 +205,7 @@
     LEDCTL_AEWIN_APV1880,
     LEDCTL_AEWIN_SCB1939,
     LEDCTL_CASWELL_CAR3080,
+    LEDCTL_CASWELL_CAR5060,
     LEDCTL_AEWIN_CB1920,
 };
 
@@ -247,6 +248,7 @@
 #define CHIPSET_ID_CAR3080		0x00003080 /*CASELL CAR-3080 MB for APV1900/2900*/
 #define CHIPSET_ID_CB1924		0x00001924 /*Aewin CB-1924 MB for APV5900*/
 #define CHIPSET_ID_CB1920		0x00001920 /*Aewin CB-1920 MB for APV7900/9900*/
+#define CHIPSET_ID_CAR5060		0x00005060 /*CASELL CAR-5060 MB for APV8900*/
 
 #define NONARRAYMB    			"Unknown"
 
@@ -269,6 +271,7 @@
 
 #define APV5200_MB_H8DAE_2  "H8DAE-2"
 #define TM_NCE_MB_CAR3080		"CAR-3080"
+#define TM_NCE_MB_CAR5060		"CAR-5060"
 #define TM_NCE_MB_CB1924		"CB-1924"
 #define TM_NCE_MB_CB1920		"CB-1920"